Der Beitrag analysiert Struktur, Funktion, Wandel und kulturelle Bedeutung von TV-Jahres- bzw. Jahrhundertrückblicken als prominenten "Erinnerungsfiguren" für unser Kulturelles Gedächtnis. Erzeigt an Beispielen, dass diese Rückblicke ein lohnendes Objekt für eine kulturanalytische Medienlinguistik darstellen, um zum Beispiel diskursanalytisch, kulturgeschichtlich und kulturvergleichend herauszuarbeiten, wie multimodale Erinnerungsbausteine semiotisch adaptiert, strategisch gerahmt oder auch erinnerungspolitisch instrumentalisiert werden, welche Diskurse wie mit ihnen verknüpft werden (sollen). ; Waldemar Czachur
Gefährden populäre Formen der Politikvermittlung in den Medien die Qualität der öffentlichen Kommunikation? Oder stellen sie eine zeitgemäße, unterhaltsame Form der Politikvermittlung für breitere Bevölkerungskreise dar? Der vorliegende Band greift diese aktuelle Diskussion aus sprachwissenschaftlicher Sicht auf: Wer nach einer Veränderung politischer Prozesse in der Mediengesellschaft fragt, sollte genau hinsehen und sich vor idealisierenden Mythen, falschen Vergleichen und vorschnellen Urteilen in Acht nehmen.
Social Media stellen die Medienwissenschaft vor neue theoretische und methodische Herausforderungen, geht es doch um die Analyse großer, dynamischer und vielfältig vernetzter Datenmengen (Big Data) über raumzeitliche Grenzen hinweg. Gefragt ist daher eine systematische Kombination qualitativer mit quantitativen Verfahren, da klassische mikroanalytische Fallanalysen aufgrund des Umfangs, der Vielfalt und Eigendynamik der Daten in vernetzten Online-Medien allein an ihre Grenzen stoßen, automatisierte Tracking-Verfahren hingegen blind für die Feinheiten kommunikativen Handelns bleiben. Den Ertrag einer solchen Methodenkombination demonstrieren wir im Beitrag am Beispiel der politischen Twitter-Kommunikation in Deutschland.
Die Relevanz der Gesprächsforschung steht außer Frage: Gespräche sind grundlegend für jede Form menschlicher Gemeinschaft und Gesellschaft. Ob in Unternehmen, im Schulunterricht oder in der Politik, ob im privaten Liebesgeflüster, in der Talk-Show oder im Internet-Chat: Unablässig erzeugen, verändern und repräsentieren wir unsere Welt in Gesprächen. Gesellschaft, Kultur und Geschichte wären undenkbar ohne verbale Interaktion. So ubiquitär Gespräche sind, so unendlich vieles ist involviert, wenn Gespräche geführt und verstanden werden sollen. Sicher, zuallererst Sprache, doch noch vieles mehr: Stimme, Blicke, Gesten, Gefühle und Hintergedanken, soziale Voraussetzungen und Folgen, physische Prozesse und historische Situationen. Dies sind natürlich, recht verstanden, nicht verschiedene "Dinge", die man sorgsam nebeneinander stellen könnte. Diese Mannigfaltigkeit von Perspektiven zeigt an, dass das, was in Gesprächen und durch sie geschieht, nicht auf einen einzigen Zugang, etwa den einer einzigen Disziplin oder Schule zu reduzieren ist.
OpenMP is traditionally focused on boosting performance in HPC systems. However, other domains are showing an increasing interest in the use of OpenMP by virtue of key aspects introduced in recent versions of the specification: the tasking model, the accelerator model, and other features like the requires and the assumes directives, which allow defining certain contracts. One example is the safety-critical embedded domain, where several efforts have been initiated towards the adoption of OpenMP. However, the OpenMP specification states that "application developers are responsible for correctly using the OpenMP API to produce a conforming program", being not acceptable in high integrity systems, where aspects such as reliability and resiliency have to be ensured at different levels of criticality. In this scope, programming languages like Ada propose a different paradigm by exposing fewer features to the user, and leaving the responsibility of safely exploiting the full underlying architecture to the compiler and the runtime systems, instead. The philosophy behind this kind of model is to move the responsibility of producing correct parallel programs from users to vendors. In this panel, actors from different domains involved in the use of parallel programming models for the development of high-integrity systems share their thoughts about this topic. ; This work has received funding from the European Union's Horizon 2020 research and innovation programme under grant agreement No 871669. We would also like to express our gratitude to the organizers of the HILT workshop. ; Peer Reviewed ; Postprint (author's final draft)
OpenMP tasking supports parallelization of irregular algorithms. Recent OpenMP specifications extended tasking to increase functionality and to support optimizations, for instance with the taskloop construct. However, task scheduling remains opaque, which leads to inconsistent performance on NUMA architectures. We assess design issues for task affinity and explore several approaches to enable it. We evaluate these proposals with implementations in the Nanos++ and LLVM OpenMP runtimes that improve performance up to 40 % and significantly reduce execution time variation. ; Sandia National Laboratories is a multi-program laboratory managed and operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation, for the U.S. Department of Energys National Nuclear Security Administration under contract DE-AC04-94AL85000. This work has been developed with the support of the grant SEV-2011-00067 of the Severo Ochoa Program, awarded by the Spanish Government, by the Spanish Ministry of Science and Innovation (TIN2015-65316-P, Computacion de Altas Prestaciones VII) and by the Intel-BSC Exascale Lab collaboration project. Some of the experiments were performed with computing resources granted by JARA- HPC from RWTH Aachen University under project jara0001. Parts of this work were funded by the German Federal Ministry of Research and Education (BMBF) under grant numbers 01IH13008A(ELP). Intel and Xeon are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. * Other names and brands are the property of their respective owners. Software and workloads used in performance tests may have been optimized for per- formance only on Intel microprocessors. Performance tests, such as SYSmark and Mobile-Mark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more information go to http://www.intel.com/performance. Intel's compilers may or may not optimize to the same degree for non-Intel micro- processors for optimizations that are not unique to Intel microprocessors. These opti- mizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. ; Peer Reviewed ; Postprint (author's final draft)
OpenMP tasking supports parallelization of irregular algorithms. Recent OpenMP specifications extended tasking to increase functionality and to support optimizations, for instance with the taskloop construct. However, task scheduling remains opaque, which leads to inconsistent performance on NUMA architectures. We assess design issues for task affinity and explore several approaches to enable it. We evaluate these proposals with implementations in the Nanos++ and LLVM OpenMP runtimes that improve performance up to 40 % and significantly reduce execution time variation. ; Sandia National Laboratories is a multi-program laboratory managed and operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation, for the U.S. Department of Energys National Nuclear Security Administration under contract DE-AC04-94AL85000. This work has been developed with the support of the grant SEV-2011-00067 of the Severo Ochoa Program, awarded by the Spanish Government, by the Spanish Ministry of Science and Innovation (TIN2015-65316-P, Computacion de Altas Prestaciones VII) and by the Intel-BSC Exascale Lab collaboration project. Some of the experiments were performed with computing resources granted by JARA- HPC from RWTH Aachen University under project jara0001. Parts of this work were funded by the German Federal Ministry of Research and Education (BMBF) under grant numbers 01IH13008A(ELP). Intel and Xeon are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. * Other names and brands are the property of their respective owners. Software and workloads used in performance tests may have been optimized for per- formance only on Intel microprocessors. Performance tests, such as SYSmark and Mobile-Mark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more information go to http://www.intel.com/performance. Intel's compilers may or may not optimize to the same degree for non-Intel micro- processors for optimizations that are not unique to Intel microprocessors. These opti- mizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. ; Peer Reviewed ; Postprint (author's final draft)
